1. Technical Field
The technology relates to methods and structures for making insulated fin-field-effect transistors on bulk semiconductor wafers.
2. Discussion of the Related Art
Transistors are fundamental device elements of modern digital processors and memory devices. Currently, there are a variety of transistor designs or types that may be used for different applications. Various transistor types include, for example, bipolar junction transistors (BJT), junction field-effect transistors (JFET), metal-oxide-semiconductor field-effect transistors (MOSFET), vertical channel or trench field-effect transistors, and superjunction or multi-drain transistors. One type of transistor that has emerged within the MOSFET family of transistors is a fin field-effect transistor (finFET).
An example of a finFET is depicted in the perspective view of FIG. 1A. A finFET may be fabricated on a bulk semiconductor substrate 110, e.g., a silicon substrate, and comprise a fin-like structure 115 that runs in a length direction along a surface of the substrate and extends in a height direction normal to the substrate surface. The fin 115 may have a narrow width, e.g., less than 250 nanometers. There may be an insulating layer 105, e.g., an oxide layer, on a surface of the substrate. A gate structure comprising a conductive gate material 130 and gate insulator 135 may be formed over a region of the fin. A source region 120 and drain region 140 may be formed adjacent the gate.
FIG. 1B depicts an elevation view of a finFET through a cross-section indicated by the dashed line in FIG. 1A. In some embodiments, a gate structure of a finFET may include spacers 132. Line 155 indicates an approximate vertical extent of the fin 115, and line 150 indicates an approximate vertical extent of the gate material 130 that surrounds the fin, as depicted in FIG. 1A for example.
FinFETs have favorable electrostatic properties for complimentary MOS scaling to smaller sizes. Because the fin is a three-dimensional structure, the transistor's channel can be formed on three surfaces of the fin, so that the finFET can exhibit a high current switching capability for a given surface area occupied on substrate. Since the channel and device can be raised from the substrate surface, there can be reduced electric field coupling between adjacent devices as compared to conventional planer MOSFETs.